Many compositions and methods for chemical-mechanical polishing (CMP) the surface of a substrate are known in the art. Polishing compositions (also known as polishing slurries, CMP slurries, and CMP compositions) typically contain an abrasive material in an aqueous carrier. A surface of a substrate is abraded to polish the surface by contacting the surface with a polishing pad and moving a polishing pad relative to the surface while maintaining a CMP slurry between the pad and the surface. Typical abrasive materials include silicon dioxide, cerium oxide, aluminum oxide, zirconium oxide, and tin oxide. U.S. Pat. No. 5,527,423 to Neville, et al., for example, describes a method for chemically-mechanically polishing a metal layer by contacting the surface with a polishing slurry comprising high purity fine metal oxide particles in an aqueous medium. Alternatively, the abrasive material may be incorporated into the polishing pad. U.S. Pat. No. 5,489,233 to Cook et al. discloses the use of polishing pads having a surface texture or pattern, and U.S. Pat. No. 5,958,794 to Bruxvoort et al. discloses a fixed abrasive polishing pad.
Conventional polishing systems and polishing methods typically are not entirely satisfactory at planarizing metal-containing semiconductor wafers. In particular, polishing compositions and polishing pads can have less than desirable polishing rates, and their use in the chemical-mechanical polishing of semiconductor surfaces can result in poor surface quality. This is particularly true for noble metals such as ruthenium.
The difficulty in creating an effective polishing system for semiconductor wafers stems from the complexity of the semiconductor wafer. Semiconductor wafers are typically composed of a substrate on which a plurality of transistors has been formed. Integrated circuits are chemically and physically connected into a substrate by patterning regions in the substrate and layers on the substrate. To produce an operable semiconductor wafer and to maximize the yield, performance, and reliability of the wafer, it is desirable to polish select surfaces of the wafer (e.g., a metal-containing surface) without adversely affecting underlying structures or topography. In fact, various problems in semiconductor fabrication can occur if the process steps are not performed on wafer surfaces that are adequately planarized. Because the performance of a semiconductor wafer is directly associated with the planarity of its surface, it is crucial to use a polishing composition and method that results in a high polishing efficiency, uniformity, and removal rate and leaves a high quality polish with minimal surface defects. In many cases, the hardness and chemical stability of the various materials making up the wafer can vary widely, further complicating the polishing process.
In conventional CMP techniques, a substrate carrier or polishing head is mounted on a carrier assembly and positioned in contact with a polishing pad in a CMP apparatus. The carrier assembly provides a controllable pressure to the substrate, urging the substrate against the polishing pad. The substrate is moved relative to the pad by an external driving force. The relative movement of the pad and substrate serves to abrade the surface of the substrate to remove a portion of the material from the substrate surface, thereby polishing the substrate. The polishing of the substrate by the relative movement of the pad and the substrate typically is further aided by the chemical activity of the polishing composition and/or the mechanical activity of an abrasive suspended in the polishing composition.
Ruthenium is a noble metal used in fabricating high performance semiconductor devices and capacitors in DRAM devices. Because of the chemical and mechanical stability of ruthenium, substrates containing this metal generally are difficult to polish, and may require the use of strong oxidizers to achieve relatively high removal rates (e.g., 200 Å/min or greater Ru removal). Unfortunately, the use of strong oxidizers (e.g., oxone or ceric ammonium nitrate) can lead to the formation of highly toxic and volatile ruthenium(VIII) tetroxide (RuO4) during the polishing process. Typically, weaker oxidants such as hydrogen peroxide are not very efficient in ruthenium polishing processes, requiring long polishing times and a high polishing pressure in order to adequately planarize the ruthenium. These conditions can result in undesirable separation of the ruthenium layer from the interlayer insulating layer, as well as dishing and erosion effects on the ruthenium layer adjacent to the interlayer. It is also desirable for Ru CMP compositions to provide relatively high silicon dioxide removal rates (e.g., about 200 Å/min or greater removal rate for plasma enhanced tetraethylorthosilicate-derived SiO2, PETEOS), in addition to relatively high Ru removal rates and low defectivity.
There is an ongoing need to develop CMP compositions that are capable of polishing a semiconductor substrate, particularly a ruthenium-containing substrate, without the use of strong, RuO4-generating oxidants, and which exhibit relatively high ruthenium removal rates. The present invention provides such CMP compositions. These and other advantages of the invention, as well as additional inventive features, will be apparent from the description of the invention provided herein.